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Quantum Computing Won’t Scale Without HPC | NVIDIA, AMD, HPE & Riverlane at QWC 2026

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Engineers installing an IBM Quantum System One cryogenic assembly at FraunhoferContext photo · Holger Muench / IBM · CC BY 2.0

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Engineers install IBM Quantum System One at Fraunhofer. Archival quantum-computing context, not a video frame or the apparatus of another study.

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Bob Sutor moderates NVIDIA, AMD, HPE and Riverlane speakers on the classical infrastructure fault-tolerant quantum computing would need: real-time error correction, calibration, scheduling, networking, orchestration and CPU/GPU/FPGA/QPU co-design. This is a conference panel, not proof that such a stack has already delivered useful advantage.

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