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COMPANY RESEARCH · Computing hardware

ARQUE Systems

ARQUE Systems develops silicon electron-spin quantum computers from research at RWTH Aachen and Forschungszentrum Jülich. Its scaling strategy combines semiconductor fabrication, electron transport between operating locations and eventual integration with cryogenic control electronics. The intended value is a compact processor architecture that can connect qubits without dedicating a separate control path to every interaction. Based in Aachen, Germany.

Official website ↗
Germany · Research reviewed 10 Sept 2026

Initial record: initial research brief recorded.

Review history 1 record

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Identity & attribution
Organization record
ARQUE Systems (organization-arque-systems)
Recorded role
Quantum Computing Hardware
Recorded aliases
No aliases recorded in this assessment.
Name and period
No dated name or ownership transition is recorded here. An alias is a search aid, not evidence of a legal ownership relationship.
Product scope
Silicon electron-spin qubits; electron shuttling; cryogenic control integration.

A company profile may discuss several systems. Capabilities remain attached to the product and conditions named in each source; they do not transfer automatically to related organizations. A verified security relationship has not been attached to this record.

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TECHNOLOGY & ACCESS

What it does. Where it fits.

Silicon electron-spin qubits; electron shuttling; cryogenic control integration.

Who should look closer

Research teams exploring semiconductor quantum processor research, hpc–quantum integration, scalable qubit-connectivity experiments.

QubitWire’s editorial assessment of practical fit.

Institutional systems and partnerships

Engagement is through system-development partnerships. A Jülich integration announcement describes a five-qubit processor within a DGX Quantum installation.

Check the current access route ↗
DOCUMENTED EVIDENCE

What the sources establish

ARQUE Systems develops silicon electron-spin quantum computers from research at RWTH Aachen and Forschungszentrum Jülich. Its scaling strategy combines semiconductor fabrication, electron transport between operating locations and eventual integration with cryogenic control electronics. The intended value is a compact processor architecture that can connect qubits without dedicating a separate control path to every interaction.

What remains unresolved

The company’s large qubit-count roadmap and comparative performance multipliers are ambitions, not verified capacities of the announced small processor.

The next question to watch

Demonstrate larger shuttling-connected registers with measured operation errors.

A research question, not a promised milestone.

QubitWire coverage

No published QubitWire stories currently match this organization. The evidence sources below provide the starting point.

Open research questions

Editorial questions for this profile. No reviewed closure decision has been recorded; unanswered questions do not lower the official score.

Open research question

Demonstrate larger shuttling-connected registers with measured operation errors.

What evidence would help

A source addressing this question must identify the named system, experiment or deployment, its conditions, measured outcome and remaining limitations. Does the result report errors, circuit depth and a credible classical baseline?

What would resolve it?

An editorial review must explain which part of this question the evidence resolves. A roadmap or an announcement alone does not close it.

No resolved, partial or disputed outcome is asserted without a reviewed transition and its evidence.

Suggest evidence
Open research question

Which named system or service can I use under the documented access route?

What evidence would help

Check the current terms for institutional systems and partnerships. Identify the system version, eligibility, restrictions and whether the result used hardware or simulation.

What would resolve it?

Current primary documentation must identify the offering, eligible user and access conditions. An unspecified company-level access claim is insufficient.

No resolved, partial or disputed outcome is asserted without a reviewed transition and its evidence.

Suggest evidence
Open research question

Can you access the named system today, and under which plan?

What evidence would help

Provide the source location, relevant product or generation, workload, resource constraints and reported uncertainty. Keep measurements, simulations and announced targets distinct.

What would resolve it?

A source reviewer must map the evidence to this exact scope. Missing disclosure remains unknown; it is not technical failure.

No resolved, partial or disputed outcome is asserted without a reviewed transition and its evidence.

Suggest evidence

Questions are drawn from the existing brief and sector reading guide. Research brief reviewed 10 Sept 2026. Following stores a local bookmark; it does not send email alerts or imply a scheduled review.

Since your review

Scope: ARQUE Systems. Reading a page never marks its records reviewed.

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A claim-to-assessment source trace is not available for this directory record.

CHECK THE ORIGINALS

Sources & evidence

  1. ARQUE company and architecture ↗Official company page · Publication date not stated

    Identifies silicon spin-qubit focus, cryogenic-electronics plans, research origins and Aachen address.

  2. ARQUE legal notice ↗Official company page · Publication date not stated

    Verifies ARQUE Systems GmbH identity.

  3. Jülich DGX Quantum deployment announcement ↗Official integration-partner announcement · Publication date not stated

    Integration partner identifies ARQUE’s five-qubit processor and electron-shuttling approach.

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