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COMPANY RESEARCH · Computing hardware

Oxford Quantum Circuits (OQC)

Executes circuits on superconducting coaxmon qubits and connects the quantum processor to cloud or high-performance computing workflows.

Official website ↗
United Kingdom · Research reviewed 7 Sept 2026

Initial record: initial assessment recorded.

Review history 1 record

Record dates use UTC and show when an assessment or clarification was saved. Review dates show the evidence check. Earlier records were recovered from QubitWire’s source history; no earlier score movement is inferred.

Identity & attribution
Organization record
Oxford Quantum Circuits (OQC) (organization-016)
Recorded role
Superconducting coaxmon processors and hosted quantum access
Recorded aliases
No aliases recorded in this assessment.
Name and period
No dated name or ownership transition is recorded here. An alias is a search aid, not evidence of a legal ownership relationship.
Product scope
Superconducting coaxmon gate-model computing

A company profile may discuss several systems. Capabilities remain attached to the product and conditions named in each source; they do not transfer automatically to related organizations. A verified security relationship has not been attached to this record.

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TECHNOLOGY & ACCESS

What it does. Where it fits.

Superconducting coaxmon gate-model computing

Who should look closer

Teams testing hybrid HPC applications and developers seeking hosted superconducting hardware access.

QubitWire’s editorial assessment of practical fit.

Cloud and HPC installations

OQC Cloud provides Toshiko access under scheduled windows and account terms. CUDA-Q supports explicit Toshiko selection; local emulation is a separate mode.

Check the current access route ↗
DOCUMENTED EVIDENCE

What the sources establish

A January 2026 preprint reports reduced two-qubit errors on a selected Toshiko chain. A separate CESGA/Fujitsu/OQC paper documents a deployed hybrid HPC system.

What remains unresolved

The error-budget result concerns selected pairs on one device generation. HPC integration and commercial access do not demonstrate computational advantage, and hardware capability should not be inferred from emulator results.

The next question to watch

Can external workload studies reproduce dependable application performance as gate quality and hybrid-system execution improve?

A research question, not a promised milestone.

QubitWire coverage

No published QubitWire stories currently match this organization. The evidence sources below provide the starting point.

Open research questions

Editorial questions for this profile. No reviewed closure decision has been recorded; unanswered questions do not lower the official score.

Open research question

Can external workload studies reproduce dependable application performance as gate quality and hybrid-system execution improve?

What evidence would help

A source addressing this question must identify the named system, experiment or deployment, its conditions, measured outcome and remaining limitations. Does the result report errors, circuit depth and a credible classical baseline?

What would resolve it?

An editorial review must explain which part of this question the evidence resolves. A roadmap or an announcement alone does not close it.

No resolved, partial or disputed outcome is asserted without a reviewed transition and its evidence.

Suggest evidence
Open research question

Which named system or service can I use under the documented access route?

What evidence would help

Check the current terms for cloud and hpc installations. Identify the system version, eligibility, restrictions and whether the result used hardware or simulation.

What would resolve it?

Current primary documentation must identify the offering, eligible user and access conditions. An unspecified company-level access claim is insufficient.

No resolved, partial or disputed outcome is asserted without a reviewed transition and its evidence.

Suggest evidence
Open research question

Can you access the named system today, and under which plan?

What evidence would help

Provide the source location, relevant product or generation, workload, resource constraints and reported uncertainty. Keep measurements, simulations and announced targets distinct.

What would resolve it?

A source reviewer must map the evidence to this exact scope. Missing disclosure remains unknown; it is not technical failure.

No resolved, partial or disputed outcome is asserted without a reviewed transition and its evidence.

Suggest evidence

Questions are drawn from the existing brief and sector reading guide. Research brief reviewed 7 Sept 2026. Following stores a local bookmark; it does not send email alerts or imply a scheduled review.

Since your review

Scope: Oxford Quantum Circuits (OQC). Reading a page never marks its records reviewed.

Keep a baseline and explicitly mark the evidence you have reviewed. This optional journal stays in this browser.

Existing material records remain available after setup. Routine rechecks and initial entries are excluded from material counts.

From claim to assessment

These are the existing assessment claims and their recorded criterion links. A source link is not an independent replication. New research does not change these published ratings automatically.

Source references in method 1.0 · assessment reviewed 7 Sept 2026
Recorded claim & sourceAssessment linkageProvenance & limits
Source 1

OQC researchers report median two-qubit error falling from 4.6% to 1.2% on a tested 16-qubit chain in Toshiko gen-1 using interleaved randomized benchmarking. This is a preprint.

Echo Cross Resonance gate error budgeting on a superconducting quantum processor ↗Published 28 Jan 2026
Exact source location

No page, figure or section locator is recorded. Open the source and check the claim in its original context.

Capability

The 2026 preprint measures error suppression on an operating processor with a declared benchmark and tested subset.

Published rating inputs remain unchanged.
Organization-originated source

Source type: paper. Independent replication, experiment date and source-version fingerprint are not separately recorded.

Product and measurement scope: read the named system and conditions in this claim. No normalized product revision is assigned.

Review recorded 7 Sept 2026. Research brief reviewed 7 Sept 2026. These dates do not establish publication or experiment dates.

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Source 2

CESGA, Fujitsu and OQC describe an operating 32-qubit Toshiko/HPC installation, calibration routines and software integration. The paper includes vendor coauthors and is not independent replication.

QMIO: A tightly integrated hybrid HPCQC system ↗Published 25 May 2025
Exact source location

No page, figure or section locator is recorded. Open the source and check the claim in its original context.

Delivery

Current cloud offering and access terms provide a defined route to hardware; the QMIO paper reports an installed system.

Use in practice

CESGA and partners describe operation of a real integrated HPC/QPU installation. Vendor coauthorship is disclosed.

Integration

The deployment paper and CUDA-Q guide document working framework and HPC interoperability.

Published rating inputs remain unchanged.
Organization-originated source

Source type: paper. Independent replication, experiment date and source-version fingerprint are not separately recorded.

Product and measurement scope: read the named system and conditions in this claim. No normalized product revision is assigned.

Review recorded 7 Sept 2026. Research brief reviewed 7 Sept 2026. These dates do not establish publication or experiment dates.

Report an issue with this claim →
Source 3

Offers on-demand access to 32-qubit Toshiko hardware, emulators, usage monitoring and technical resources through scheduled access windows.

OQC Cloud ↗Published Not recorded
Exact source location

No page, figure or section locator is recorded. Open the source and check the claim in its original context.

Delivery

Current cloud offering and access terms provide a defined route to hardware; the QMIO paper reports an installed system.

Published rating inputs remain unchanged.
Organization-originated source

Source type: official. Independent replication, experiment date and source-version fingerprint are not separately recorded.

Product and measurement scope: read the named system and conditions in this claim. No normalized product revision is assigned.

Review recorded 7 Sept 2026. Research brief reviewed 7 Sept 2026. These dates do not establish publication or experiment dates.

Report an issue with this claim →
Source 4

Describes account-based quantum-computing access subject to an order form, fees and an allocated access period.

QCaaS Terms and Conditions — OQC ↗Published Not recorded
Exact source location

No page, figure or section locator is recorded. Open the source and check the claim in its original context.

Delivery

Current cloud offering and access terms provide a defined route to hardware; the QMIO paper reports an installed system.

Published rating inputs remain unchanged.
Organization-originated source

Source type: official. Independent replication, experiment date and source-version fingerprint are not separately recorded.

Product and measurement scope: read the named system and conditions in this claim. No normalized product revision is assigned.

Review recorded 7 Sept 2026. Research brief reviewed 7 Sept 2026. These dates do not establish publication or experiment dates.

Report an issue with this claim →
Source 5

Documents OQC registration, credentials, Toshiko machine selection and the separate local-emulation mode. This is partner integration documentation.

Superconducting — NVIDIA CUDA-Q documentation ↗Published Not recorded
Exact source location

No page, figure or section locator is recorded. Open the source and check the claim in its original context.

Integration

The deployment paper and CUDA-Q guide document working framework and HPC interoperability.

Published rating inputs remain unchanged.
Organization-originated source

Source type: technical. Independent replication, experiment date and source-version fingerprint are not separately recorded.

Product and measurement scope: read the named system and conditions in this claim. No normalized product revision is assigned.

Review recorded 7 Sept 2026. Research brief reviewed 7 Sept 2026. These dates do not establish publication or experiment dates.

Report an issue with this claim →
Revision and evidence-family boundaries

Record reference: 45b4073873f4e9c491e037ed84fc67b86f560b6178ad1b39444868347d0ce1e7. Read prior recorded revisions.

Repeated coverage can describe the same experiment. The assessment does not contain a reviewed claim-family grouping, so the number of links is never shown as a replication count. Source pages can change independently of this saved assessment; the original source text is not archived here.

CHECK THE ORIGINALS

Sources & evidence

  1. Echo Cross Resonance gate error budgeting on a superconducting quantum processor ↗Organization-originated source · 28 Jan 2026

    OQC researchers report median two-qubit error falling from 4.6% to 1.2% on a tested 16-qubit chain in Toshiko gen-1 using interleaved randomized benchmarking. This is a preprint.

  2. QMIO: A tightly integrated hybrid HPCQC system ↗Organization-originated source · 25 May 2025

    CESGA, Fujitsu and OQC describe an operating 32-qubit Toshiko/HPC installation, calibration routines and software integration. The paper includes vendor coauthors and is not independent replication.

  3. OQC Cloud ↗Organization-originated source · Publication date not stated

    Offers on-demand access to 32-qubit Toshiko hardware, emulators, usage monitoring and technical resources through scheduled access windows.

  4. QCaaS Terms and Conditions — OQC ↗Organization-originated source · Publication date not stated

    Describes account-based quantum-computing access subject to an order form, fees and an allocated access period.

  5. Superconducting — NVIDIA CUDA-Q documentation ↗Organization-originated source · Publication date not stated

    Documents OQC registration, credentials, Toshiko machine selection and the separate local-emulation mode. This is partner integration documentation.

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