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HARDWARE · ERROR CORRECTION

Microsoft and Quantinuum Report Lower Logical Circuit Errors

A Nature study reports 11-fold to 800-fold improvements against selected physical circuit baselines using correction, detection and postselection.

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A real NIST planar ion-trap chip used for quantum-computing research
Photo: NIST

A NIST planar ion trap, used as representative hardware context for Microsoft’s error-correction work on Quantinuum systems. Image credit“Planar Ion Trap” by the National Institute of Standards and Technology. Reused under NIST public-information policy. · https://www.nist.gov/copyrights-disclaimers

Microsoft and Quantinuum researchers have made selected trapped-ion circuits more reliable by encoding their operations in . The experiments were published in Nature on June 10. The goal is to protect useful operations well enough that they outperform their unencoded physical equivalents—a central reason for building logical qubits.

The study reports error reductions of 11-fold to 800-fold against several physical circuit baselines. It uses a 12-qubit code encoding two qubits and a 16-qubit code encoding four, with , detection and postselection contributing to the results.

Those conditions matter: the largest reduction is not a performance multiplier that applies to every circuit. Extending the result to larger tasks also requires accounting for accepted-shot rates, resource costs and whether the lower logical errors persist through longer computations.

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