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Alice & Bob

Layout Scale-Up Engineer

Paris, FranceHybridPermanent contract (CDI); working hours unconfirmed

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The role at a glance

What you would work on

Build process design kits, automated layout generators and verification flows to scale superconducting quantum-chip physical design.

This is a short QubitWire summary. Read the employer’s original listing for the full responsibilities, qualifications and application instructions.

Qualifications and experience

Full qualification requirements are not supplied in this summary. Read the employer’s required and preferred qualifications and any stated equivalent-experience pathway.

A missing degree requirement here does not mean that no degree is required. The employer’s full wording is the reference for eligibility.

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Location and compensation

Paris, France · Hybrid.

Pay not listed

Check the employer’s full compensation terms. No conversion or estimate is supplied. No complete salary band is available for minimum-pay filters.

Work location is not a statement about visa sponsorship or work authorization. Confirm eligibility and attendance expectations in the employer’s posting.

Additional employer notes

  • The employer labels the contract CDI; the full-time or part-time schedule is not confirmed.
  • The original posting date is not confirmed; the ATS creation timestamp is not used as a posting date.

Source and review

Published by Alice & Bob through Lever. Source checked: at 18:34 UTC.

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A source check confirms the listing we reviewed. It is not an employer endorsement or a guarantee that the role remains available.

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Understand the work

Superconducting device engineer

Connect device design, characterization and fabrication feedback.

QubitWire category: Hardware. This editorial classification is separate from the employer’s title.