The role at a glance
What you would work on
Investigate and reduce two-qubit gate errors on superconducting processors, developing calibration and pulse-control methods that can scale across many qubit pairs. The role requires a relevant PhD and hands-on gate-characterization experience.
This is a short QubitWire summary. Read the employer’s original listing for the full responsibilities, qualifications and application instructions.
Qualifications and experience
Full qualification requirements are not supplied in this summary. Read the employer’s required and preferred qualifications and any stated equivalent-experience pathway.
A missing degree requirement here does not mean that no degree is required. The employer’s full wording is the reference for eligibility.
Read the employer’s requirementsLocation and compensation
Berkeley, CA · Hybrid.
USD 175,000–200,000 / year · US-CA
Employer labels the published USD 175,000–200,000 annual range as base salary; final compensation depends on experience, skills and location.
Work location is not a statement about visa sponsorship or work authorization. Confirm eligibility and attendance expectations in the employer’s posting.
Additional employer notes
- Hybrid is stated by ATS; office-day frequency is not specified for this role. No remote-country entitlement is inferred.
- Lever createdAt is not treated as an employer posting date.
Source and review
Published by Rigetti Computing through Lever. Source checked: at 18:34 UTC.
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Understand the work
Superconducting device engineer
Connect device design, characterization and fabrication feedback.
QubitWire category: Hardware. This editorial classification is separate from the employer’s title.