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A fast dual-rail gate retains detectable errors
Reported: D-Wave’s research team reports an approximately 500-nanosecond controlled-Z gate between two dual-rail cavity qubits.
Supported observation: The Nature paper reports about 0.5% erasures per gate and residual Pauli errors below 0.1% in its characterization.
Conditions: Two encoded qubits use superconducting microwave cavities and a transmon coupler. Residual errors are evaluated after detected erasures are removed; they must be read alongside the erasure rate. Characterization uses state tomography and interleaved randomized benchmarking. Larger-code comparisons are simulated.
Not established: This is not a demonstrated large error-corrected processor. Error behavior worsens at greater repeated-gate depth; the surface-code simulation assumes perfect erasure checks and restricted noise models.
Next evidence: Repeated logical error-correction cycles on larger hardware with imperfect checks and all operational errors included.
An entangling gate for dual-rail erasure qubits · Peer-reviewed primary research paper · 2026-08-05
https://www.nature.com/articles/s41586-026-10822-y
Source checked 2026-09-26
Revision: claim-dual-rail-entangling-gate-errors-r1 · 2026-09-26
Review: Source and editorial check. Attributed primary-source summary; no independent scientific review.
Independent replication: not assessed.
Cited revision: https://qubitwire.com/evidence/dual-rail-entangling-gate-errors?revision=claim-dual-rail-entangling-gate-errors-r1
Current corrections: https://qubitwire.com/evidence/dual-rail-entangling-gate-errors
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